Hardware Engineering Manager, SIPI, Pixel Watch
at Google
Location
Mountain View, CA, USA
Compensation
$189k–$274k USD
Type
full time
Posted
2 weeks ago
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Job description
The Google Pixel team focuses on designing and delivering the world's most helpful mobile experience. The team works on shaping the future of Pixel devices and services through some of the most advanced designs, techniques, products, and experiences in consumer electronics. This includes bringing together the best of Google’s artificial intelligence, software, and hardware to build global smartphones and create transformative experiences for users across the world.
The US base salary range for this full-time position is $189,000-$274,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.
Responsibilities
- Lead the SIPI team through all stages of Pixel Watch development, from initial architecture and prototyping to mass production.
- Direct and own end-to-end SIPI analysis, including power delivery network (PDN) simulation, printed circuit board (PCB)/flexible printed circuit board (FPCB) stackup definition, routing rule development, and system performance optimization.
- Execute simulation design of experiments (DOEs) to drive critical decisions regarding trade-offs between power, performance, cost, and quality.
- Drive simulation technology innovation to streamline workflows, improve efficiency, and expand team capabilities.
- Support team growth and professional development, mentoring members to enhance both technical expertise and career. Oversee SIPI validation and simulation/measurement correlation to continuously refine and improve simulation accuracy.
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
- 6 years of experience working in a Signal and Power Integrity technical environment.
- 3 years of experience in technical leadership.
- Experience with scripting in MATLAB or Python.
- Experience in electromagnetics and transmission line theory including EDA tools and PCB layout tools, and advanced lab equipment such as an oscilloscope, RLC meter, VNA etc.
Preferred qualifications:
- PhD in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
- 10 years of experience in the SIPI domain, with 1 year of experience in a leadership role.
- Experience with high-speed lab test equipment and lab debugging, alongside strong scripting capabilities for automating electronic design automation (EDA) simulation and measurement workflows.
- Proficiency with industry-standard tools, including: Ansys SIwave, HFSS, and Q3D; Cadence PowerSI, PowerDC, Clarity, Allegro, and APD; Keysight ADS; CST Microwave Studio; and HSPICE.
- Knowledge of transmission line theory, electromagnetic field propagation, and near-field coupling.