Machine Learning Hardware Architect, TPU

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a Machine Learning Hardware Architect, you will influence the evolution of high-performance intelligence for next-generation computing infrastructure. You will have an opportunity to drive technology that powers large-scale systems where high throughput, reliability, and efficiency are mission-critical. You will be part of a team that pushes boundaries, developing solutions that define the future of intelligent data centers and enterprise hardware. You will contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration to deploy complex, large-scale AI models across sophisticated hardware platforms.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving channel behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

The US base salary range for this full-time position is $192,000-$278,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Develop architectural specifications for next-generation high-performance computing systems.
• Collaborate with software and systems teams to define requirements for AI workloads.
• Perform architecture studies and drive performance, scalability, and power efficiency projections.
• Influence technical roadmaps and provide strategic leadership for hardware-software platforms.
• Drive cross-functional technical alignment across multiple engineering teams to ensure system-level integration.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience in computer architecture or hardware engineering.
• Experience with performance modeling, performance analysis, or hardware-software codesign.
• Experience leading the architecture and technical direction for hardware or system-level projects.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience in the architecture of high-performance AI accelerators.
• Knowledge of system-level integration and deploying complex AI models on sophisticated hardware platforms.
• Experience driving strategic technical initiatives and mentoring executive technical staff.