Google's projects, like our users, span the globe and require managers to keep the big picture in focus while being able to dive into the unique engineering challenges we face daily. As a Technical Program Manager at Google, you lead complex, multi-disciplinary engineering projects using your engineering expertise. You plan requirements with internal customers and usher projects through the entire project lifecycle. This includes managing project schedules, identifying risks and clearly communicating them to project stakeholders. You're equally at home explaining your team's analyses and recommendations to executives as you are discussing the technical trade-offs in product development with engineers.
Using your extensive technical and leadership expertise, you manage projects of various size and scope, identifying future opportunities, improving processes and driving the technical directions of your programs.
We are seeking a talented and highly motivated Machine Learning Hardware Program Manager to join our team.
In this role, you will drive the program execution of our custom silicon portfolio, which spans both highly experimental research tracks and production-grade deployments. You will manage complex program life cycles across a hybrid ecosystem of internal engineering teams, cross-functional ML research collaborators, and silicon partners. You will work in close partnership with overall program leadership to ensure milestones are met, risk mitigation plans are executed, and seamless communication is maintained across all technical domains.
Artificial intelligence will be one of humanity’s most transformative inventions. At Google DeepMind, we are a pioneering AI lab with exceptional interdisciplinary teams focused on advancing AI development to solve complex global challenges and accelerate high-quality product innovation for billions of users. We use our technologies for widespread public benefit and scientific discovery, ensuring safety and ethics are always our highest priority.
We are pushing the boundaries across multiple domains. Our global teams offer diverse learning opportunities and varied career pathways for those driven to achieve exceptional results through collective effort.
The US base salary range for this full-time position is $256,000-$278,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about
benefits at Google.
Responsibilities
- Manage day-to-day progress across parallel custom tracks, spanning near-term production-ready and long-term experimental research ASICs.
- Drive the adoption of modern AI technologies to streamline team communication and improve overall execution efficiency.
- Maintain detailed schedules highlighting critical paths, hardware/model/software co-dependencies, and cross-functional deliverables.
- Identify program-level risks and lead the development and execution of strategic mitigation plans.
- Coordinate technical deliverables and program reviews across internal hardware/model teams, systems infrastructure, executive leadership, and external partners.
Minimum qualifications:
- Bachelor's degree in Computer Science, a related technical field or equivalent practical experience.
- 8 years of experience in program management.
Preferred qualifications:
- PMP or similar program management certification.
- Experience managing advanced, large-scale Silicon, or custom ML accelerator (inference or training) programs.
- Experience or familiarity with machine learning research or model optimization techniques (e.g., quantization, distillation).
- Experience working in a fast-paced, research-oriented environment.
- Familiarity with modern electronic design automation (EDA) toolchains, chip design workflows, or compiler toolchains.