applinity

Senior CPU Design Verification Engineer, Silicon

at Google

Location

Mountain View, CA, USA; Austin, TX, USA; Portland, OR, USA

Compensation

$163k–$237k USD

Type

full time

Posted

2 months ago

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Job description

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

The US base salary range for this full-time position is $163,000-$237,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

  • Verify designs using verification techniques and methodologies.
  • Work cross-functionally to debug failures and verify the functional correctness of the design.
  • Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.
  • Perform design verification for future CPU developments.
  • Perform functional verification and performance validation for both pre-silicon.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 5 years of experience in verification methodologies and languages such as Universal Verification Methodology (UVM) and SystemVerilog.

Preferred qualifications:

  • Master's degree or Phd in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience in low-power design verification.
  • Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages such as Python, Perl, Shell, Bash, etc.
  • Knowledge of operating systems such as Linux and Android.
  • Familiarity with Advanced RISC Machine (ARM) instruction set architecture.
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Mountain View, CA, USA; Austin, TX, USA; Portland, OR, USA; Poughkeepsie, NY, USA.