Senior Director, Physical Design

• The Senior Director of Physical Design leads end-to‑end RTL‑to‑GDSII execution for complex, cutting‑edge SoCs while scaling a world‑class engineering organization. This role is accountable for predictable delivery, technical excellence, and organizational leadership across advanced process technologies. The position partners closely with global PD leadership, CAD, architecture, and cross‑functional teams to ensure consistent methodologies, robust execution, and high‑quality tapeouts.

  Key Responsibilities 

  • Lead and scale a large physical design organization, including Directors, Senior Managers, and multi‑level engineering teams. 

  • Own organizational design, hiring strategy, performance management, and leadership development for the local PD site. 

  • Provide senior‑level accountability for RTL‑to‑GDSII execution, including synthesis, floorplanning, power delivery, P&R, CTS, timing closure, SI/PI signoff, and physical verification. 

  • Ensure predictable, high‑quality tapeouts through disciplined schedule management, risk mitigation, and execution governance. 

  • Drive alignment with global PD methodologies, flows, and automation in partnership with Marvell’s central PD and CAD teams. 

  • Collaborate with EDA vendors and foundries to deploy scalable flows and ensure readiness for advanced process nodes. 

  • Influence upstream design and architecture decisions to optimize physical implementation outcomes. 

  • Resolve cross‑functional and cross‑site issues to maintain execution momentum and organizational cohesion. 

  • Communicate execution status, risks, and resource needs clearly to executive leadership and global PD stakeholders. 

  • Mentor and develop leadership talent, fostering a high‑performance culture and strong succession pipeline. 

• Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or related fields. 

• 15+ years of experience in ASIC physical design and SoC delivery. 

• Proven track record leading large, geographically distributed engineering teams. 

• Demonstrated success delivering multiple high‑performance SoCs under aggressive schedules. 

• Deep expertise in hierarchical physical design, advanced process nodes, and modern foundry technologies. 

• Strong knowledge of full ASIC design flows and contemporary EDA toolchains. 

• Executive‑level communication skills and cross‑functional leadership experience. 

Preferred Qualifications 

• Experience driving methodology and flow standardization across large organizations. 

• Background in automation and data‑driven design optimization. 

• Familiarity with AI/ML‑assisted optimization in physical design tools. 

• Experience operating at the Director/Sr. Director/AVP level within a global engineering organization.