at Apple
Location
Sunnyvale, United States of America
Compensation
$114k–$191k USD
Type
full time
Posted
4 months ago
Market range · company + function + seniority
p25 · target · p75 · n=800
Posted $191k · well below market
Posting health
Aging · 65Tailor your résumé to this role in 30 seconds.
Free account · ATS keyword check · per-job bullet rewrite by Claude.
-Develop, improve and maintain various aspects of physical verification flow and methodology
-Coordinate the effort of validating flows, improving for custom checks and data generation
-Work with the design and PD teams to facilitate the chip design process
-Code custom PDV rule decks such as Electrical rule checks (ERC) and Programmable ERCs
-Collaborate with tool vendors and foundries for PDK performance enhancements
Minimum requirement of BS with 0 years of experience.
Knowledge in Silicon chip design flows
DRC/LVS knowledge from previous work experience or coursework
Scripting experience in programming languages such as Python, Perl or Tcl
Experience with automation and development
Knowledge of ML/LLM is a plus
Do you love building elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices.
As a member of our CAD team, you will architect, develop, maintain and improve physical design verification (PDV) flows. The role requires you to work on flow and runset development for various technology nodes and tool sets. Working alongside the CAD team, you will be collaborating with the custom digital/analog/mixed-signal design, physical design (PD) and chip integration teams. With good understanding of design rule checks (DRC) and layout versus schematic (LVS) runsets, you will develop rule decks from scratch and/or modify existing ones. You will also have opportunities to develop ML/LLM based automations and solutions.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant
At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.
Learn about accessibility in Apple’s workplace
Learn about reasonable accommodations for job applicants
Apple accepts applications to this posting on an ongoing basis.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant
At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.
Learn about accessibility in Apple’s workplace
Learn about reasonable accommodations for job applicants
Apple accepts applications to this posting on an ongoing basis.
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