Post-Silicon Full-Chip Validation Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

THE ROLE: 

The Full-Chip Functional Validation team is looking for a post-silicon validation engineer to help bring the next generation of AMD EPYC data center CPUs to market. In this role, you will validate full-chip SoC features across Data Fabric, Security, and Virtualization—critical technologies that power modern data center, cloud, and AI workloads. This is an opportunity to work on cutting-edge server technology, collaborate closely with experienced silicon, firmware, and validation engineers, and contribute directly to products used across the industry.

 

 

THE PERSON:

We are looking for a curious, hands-on engineer who enjoys solving complex technical problems and collaborating across teams to deliver high-quality products. You will partner with silicon and firmware design groups to plan, develop, and execute validation for data center SoC products throughout the product life cycle. This role offers broad exposure to server architecture, post-silicon debug, automation, and feature enablement in a fast-paced engineering environment.

 

KEY RESPONSIBILITIES: 

• Validate Data Fabric, Security, and Virtualization features in AMD EPYC data center CPU SoCs
• Use agentic AI to develop validation test plans, test content, and workloads to verify feature functionality and quality
• Debug and help drive root-cause analysis for SoC-related issues in collaboration with cross-functional teams
• Test interactions across SoC features, firmware, operating systems, and virtualized environments
• Contribute to validation infrastructure improvements, including automation, configuration checks, and log analysis
• Work with experienced engineers across design, firmware, and validation teams to improve coverage, debug efficiency, and overall product quality

 

REQUIRED EXPERIENCE: 

• A few years of experience in CPU or SoC post-silicon validation, or related semiconductor industry experience
• Familiarity with agentic AI concepts and tools
• Strong programming and scripting skills in C/C++ and Python
• Hands-on lab experience with platforms, server operating systems, and virtualized environments
• Understanding of x86 microprocessor architecture and server SoC platforms, including firmware, I/O, and DDR
• Experience developing validation methods, test content, workloads, or automation infrastructure
• Working knowledge of Linux and Windows Server environments
• Familiarity with common lab equipment, including oscilloscopes, logic analyzers, or protocol analyzers
• Strong communication and collaboration skills, with the ability to work independently and prioritize effectively

 

PREFERRED EXPERIENCE: 

• Data Fabric (coherency) validation and debug experience
• Data center security validation experience
• Virtualization validation experience, including Windows Hyper-V, Linux KVM, and VMware ESXi
• Confidential computing feature knowledge, including SEV, SEV-SNP, SEV-ES, and SEV-TIO
• Silicon debug experience at the SoC and system levels
• Ability to create positive and negative test cases that both confirm correct functionality and stress the design for robustness

  

ACADEMIC CREDENTIALS: 

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field

 

LOCATION:

• Austin, TX, US
• Santa Clara, CA, US

This role is not eligible for visa sponsorship.

 

#LI-AG1

 

#LI-HYBRID

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

THE ROLE: 

The Full-Chip Functional Validation team is looking for a post-silicon validation engineer to help bring the next generation of AMD EPYC data center CPUs to market. In this role, you will validate full-chip SoC features across Data Fabric, Security, and Virtualization—critical technologies that power modern data center, cloud, and AI workloads. This is an opportunity to work on cutting-edge server technology, collaborate closely with experienced silicon, firmware, and validation engineers, and contribute directly to products used across the industry.

 

 

THE PERSON:

We are looking for a curious, hands-on engineer who enjoys solving complex technical problems and collaborating across teams to deliver high-quality products. You will partner with silicon and firmware design groups to plan, develop, and execute validation for data center SoC products throughout the product life cycle. This role offers broad exposure to server architecture, post-silicon debug, automation, and feature enablement in a fast-paced engineering environment.

 

KEY RESPONSIBILITIES: 

• Validate Data Fabric, Security, and Virtualization features in AMD EPYC data center CPU SoCs
• Use agentic AI to develop validation test plans, test content, and workloads to verify feature functionality and quality
• Debug and help drive root-cause analysis for SoC-related issues in collaboration with cross-functional teams
• Test interactions across SoC features, firmware, operating systems, and virtualized environments
• Contribute to validation infrastructure improvements, including automation, configuration checks, and log analysis
• Work with experienced engineers across design, firmware, and validation teams to improve coverage, debug efficiency, and overall product quality

 

REQUIRED EXPERIENCE: 

• A few years of experience in CPU or SoC post-silicon validation, or related semiconductor industry experience
• Familiarity with agentic AI concepts and tools
• Strong programming and scripting skills in C/C++ and Python
• Hands-on lab experience with platforms, server operating systems, and virtualized environments
• Understanding of x86 microprocessor architecture and server SoC platforms, including firmware, I/O, and DDR
• Experience developing validation methods, test content, workloads, or automation infrastructure
• Working knowledge of Linux and Windows Server environments
• Familiarity with common lab equipment, including oscilloscopes, logic analyzers, or protocol analyzers
• Strong communication and collaboration skills, with the ability to work independently and prioritize effectively

 

PREFERRED EXPERIENCE: 

• Data Fabric (coherency) validation and debug experience
• Data center security validation experience
• Virtualization validation experience, including Windows Hyper-V, Linux KVM, and VMware ESXi
• Confidential computing feature knowledge, including SEV, SEV-SNP, SEV-ES, and SEV-TIO
• Silicon debug experience at the SoC and system levels
• Ability to create positive and negative test cases that both confirm correct functionality and stress the design for robustness

  

ACADEMIC CREDENTIALS: 

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field

 

LOCATION:

• Austin, TX, US
• Santa Clara, CA, US

This role is not eligible for visa sponsorship.

 

#LI-AG1

 

#LI-HYBRID

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.