Senior Hardware Systems Engineer, Watches

The Pixel Watch Electrical Engineering (EE) team is responsible for the end-to-end hardware development of Google's first-party Watch products. We work with product managers during initial concept and design phases, advocate new technology investigations, and manage the entire hardware lifecycle, from board integration and comprehensive validation to overseeing manufacturing to deliver products with a user experience and state-of-the-art health sensing capabilities.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits

Learn more about benefits at Google.

Responsibilities

• Be responsible for the electrical design integration and the validation of Google's Watch products.
• Deliver the boards (PCBA or FPCA) by performing all the design tasks including schematic and layout, collaboration with product design, Signal Integrity and Power Integrity (SIPI), power and sub-system teams for the design optimization.
• Bring up the system, plan the validation, trouble shooting and conduct the measurements. Debug the issue discovered from the factory production, reliability, user trial, RMA, etc.
• Collaborate with Google technical teams on the key function design requirement alignment, board routing optimization, cost analysis, and drive the engineering activities with the high priority tasks, through the entire NPI phase.
• Work closely with the operation team on giving the clear requirements for factory testing, process improvement, test coverage, and assembly issue FA and monitoring.

Minimum qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
  
• 4 years of experience working in a consumer electronics technical environment, or 3 years of experience with an advanced degree.
• Experience managing electrical subsystems or entire products from concept architecture through mass production.
• Experience with schematic capture and PCB layout tools such as Cadence OrCAD/Allegro or Altium.
• Experience in digital and analog circuit design, including high-speed signal integrity, SoC integration, and board-level power design.

Preferred qualifications:

• 7 years of experience in consumer electronics and embedded system design, with expertise in mass-volume production, DFM, and DFT.
• Experience with prototype bring-up, debugging, functional verification, manufacturing support, and working in a lab-based environment.
• Proven track record in Power Delivery Network (PDN) optimization, DCR/ACR modeling, and switching power phase response analysis.
• Advanced knowledge of DC-DC design, power tree optimization, and efficiency tuning using simulation and component selection.
• Cross-functional expertise bridging EE and software, with the ability to integrate high-density MLB design and SoC/firmware knowledge to resolve system-level issues and drive key component selection.