Wafer Fab Training Coordinator, Raxium
at Google
Location
Fremont, CA, USA
Compensation
$120k–$172k USD
Type
full time
Posted
Today
Market range · company + function + seniority
$174k—$208k—$231k
p25 · target · p75 · n=188
Posted $172k · below the band
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Job description
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
US: $120000 - $172000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
As a Wafer Fabrication Training Coordinator, you are responsible for developing, implementing, and managing comprehensive technical training programs within a semiconductor manufacturing environment.
Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.US: $120000 - $172000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities
- Oversee the operator certification process, ensuring all personnel are qualified to manage specific tools (e.g., ASML scanners, Applied Materials platforms) and maintain up-to-date training logs.
- Collaborate with Process Engineers to update training materials whenever new equipment is installed or process flows are modified.
- Work closely with process/equipment engineering to manage the development of work instruction for new equipment/processes and lead efforts for any work instruction updates as required with focus on clean room protocol and wafer fab equipment (i.e., Lithography, Thinfilms, Etch and Metrology).
- Ensure all training aligns with ISO 9001/14001 standards and OSHA safety requirements.
Minimum qualifications:
- Bachelor’s degree in Engineering, Material Science, Technical Education, a related field, or equivalent practical experience.
- 5 years of experience in semiconductor manufacturing and testing.
- 1 year of experience with documentation in a semiconductor research and development or manufacturing role.
Preferred qualifications:
- Master's degree in Engineering or equivalent practical experience.
- Familiarity with document management systems and electronic record-keeping.
- Understanding of statistical process control and improvement implementation.
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