Serdes Silicon Design and Micro-Architecture Engineer

ADVANCE YOUR CAREER. ADVANCE THE WORLD. 

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. 

 

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.

THE ROLE:

AMD Serdes Technology Group develops high-performance electrical and optical transceivers in advanced CMOS PDKs. We are seeking an expert in analog/mixed-signal circuit design and transceiver micro-architecture.

 

THE PERSON:

The ideal candidate will have a strong background in advanced ultra-high-speed electrical and/or optical PHY design and architecture.  She/He needs to be a self-starter who collaborates well with various functional teams and customers to successfully drive projects to completion.

 

KEY RESPONSIBLITIES:

• To lead transceiver micro-architecture definition, modeling, simulation, implementation, and verification: Tx and Rx analog front-end blocks, clocking circuits, DSPs, CDR, adaptation and calibration loops, firmware loops, system level interface
• To work with pre-tapeout verification for silicon design sign-off and post-silicon validation teams to bring up silicon and analyze volume productization data

 

PREFERRED EXPERIENCE:  

• Top-level and block-level electrical/optical link budgeting and modeling
• To create and maintain high-level design spec and micro-architecture spec documentations
• Participate in architecture reviews, design reviews, design verification, silicon validation

ACADEMIC CREDENTIALS:

•  Ph.D in electrical engineering or related fields with industrial experience or M.S. with relevant industrial experience in optical and/or electrical transceiver design and architecture
• Excellent communication and documentation skills are required.

 

LOCATION: San Jose, CA

This role is not eligible for visa sponsorship.

 

 

 

 

 

 

 

 

 

 

#LI-TB2

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

THE ROLE:

AMD Serdes Technology Group develops high-performance electrical and optical transceivers in advanced CMOS PDKs. We are seeking an expert in analog/mixed-signal circuit design and transceiver micro-architecture.

 

THE PERSON:

The ideal candidate will have a strong background in advanced ultra-high-speed electrical and/or optical PHY design and architecture.  She/He needs to be a self-starter who collaborates well with various functional teams and customers to successfully drive projects to completion.

 

KEY RESPONSIBLITIES:

• To lead transceiver micro-architecture definition, modeling, simulation, implementation, and verification: Tx and Rx analog front-end blocks, clocking circuits, DSPs, CDR, adaptation and calibration loops, firmware loops, system level interface
• To work with pre-tapeout verification for silicon design sign-off and post-silicon validation teams to bring up silicon and analyze volume productization data

 

PREFERRED EXPERIENCE:  

• Top-level and block-level electrical/optical link budgeting and modeling
• To create and maintain high-level design spec and micro-architecture spec documentations
• Participate in architecture reviews, design reviews, design verification, silicon validation

ACADEMIC CREDENTIALS:

•  Ph.D in electrical engineering or related fields with industrial experience or M.S. with relevant industrial experience in optical and/or electrical transceiver design and architecture
• Excellent communication and documentation skills are required.

 

LOCATION: San Jose, CA

This role is not eligible for visa sponsorship.

 

 

 

 

 

 

 

 

 

 

#LI-TB2

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.