CPU Verification Engineer

ADVANCE YOUR CAREER. ADVANCE THE WORLD. 

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. 

 

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.

THE ROLE:

As a member of AMD's Cores organization, you will verify the cache subsystems powering some of the world's highest-performance processors. Working alongside experienced engineers and closely with RTL design, architecture, and physical design teams, you will contribute to functional verification of L2 and L3 cache designs from block level through full-chip integration.

THE PERSON:

A successful candidate will be a motivated and detail-oriented engineer with strong C++ skills and a solid understanding of computer architecture. The candidate will bring good analytical and problem-solving ability, work well in a collaborative team environment, and take pride in delivering thorough, high-quality verification.

KEY RESPONSIBILITIES:

• Perform functional verification of L2 and L3 cache subsystems at block and full-chip levels.
• Build and maintain C++ verification environments including reference models, checkers, and scoreboards.
• Develop C and assembly test programs to validate cache behavior and expose corner cases.
• Debug failing tests to root cause and work with design engineers to drive resolution.
• Develop test plans and contribute to coverage closure.
• Apply AI-assisted tools and workflows as part of an innovative, modern verification practice.

PREFERRED EXPERIENCE:

• Good experience with functional verification on CPU, GPU, or complex ASIC/SoC designs.
• Strong C++ programming skills with experience building verification infrastructure.
• Solid understanding of computer architecture and cache memory systems.
• Proficiency in Python or Perl scripting for test automation and analysis.
• Familiarity with industry-standard RTL simulation and debug tools.

ACADEMIC CREDENTIALS:

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science preferred.

 

This role is not eligible for visa sponsorship.

 

#LI-MR1

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

THE ROLE:

As a member of AMD's Cores organization, you will verify the cache subsystems powering some of the world's highest-performance processors. Working alongside experienced engineers and closely with RTL design, architecture, and physical design teams, you will contribute to functional verification of L2 and L3 cache designs from block level through full-chip integration.

THE PERSON:

A successful candidate will be a motivated and detail-oriented engineer with strong C++ skills and a solid understanding of computer architecture. The candidate will bring good analytical and problem-solving ability, work well in a collaborative team environment, and take pride in delivering thorough, high-quality verification.

KEY RESPONSIBILITIES:

• Perform functional verification of L2 and L3 cache subsystems at block and full-chip levels.
• Build and maintain C++ verification environments including reference models, checkers, and scoreboards.
• Develop C and assembly test programs to validate cache behavior and expose corner cases.
• Debug failing tests to root cause and work with design engineers to drive resolution.
• Develop test plans and contribute to coverage closure.
• Apply AI-assisted tools and workflows as part of an innovative, modern verification practice.

PREFERRED EXPERIENCE:

• Good experience with functional verification on CPU, GPU, or complex ASIC/SoC designs.
• Strong C++ programming skills with experience building verification infrastructure.
• Solid understanding of computer architecture and cache memory systems.
• Proficiency in Python or Perl scripting for test automation and analysis.
• Familiarity with industry-standard RTL simulation and debug tools.

ACADEMIC CREDENTIALS:

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science preferred.

 

This role is not eligible for visa sponsorship.

 

#LI-MR1

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.