IP Validation Engineer - Machine Learning Accelerators
at Meta
Location
Sunnyvale, CA; Redmond, WA; Austin, TX
Compensation
$178k–$250k USD
Type
full time
Posted
2 weeks ago
Market range · company + function + seniority
p25 · target · p75 · n=330
Posted $250k · in the market band
Tailor your résumé to this role in 30 seconds.
Free account · ATS keyword check · per-job bullet rewrite by Claude.
Job description
Reality Labs focuses on delivering Meta's vision through On-device AI. The compute performance and power efficiency requirements of these workloads require custom silicon. Reality Labs Silicon team is driving the state of the art forward with innovative work in computer vision, machine learning, mixed reality, displays and sensors. Our chips enable On-device AI assistance and personal superintelligence features, contextualized to timing and personalized requirements. We believe the only way to achieve our goals is to look at the entire stack, from transistors to architecture, firmware, and algorithms. As a Machine Learning IP Validation Engineer at Meta Reality Labs, you will use your hardware/software integration, prototyping, emulation, firmware, and hardware validation skills to develop IP validation infrastructure; bring up, validate, and optimize ML workloads across pre-silicon and post-silicon platforms; and improve the functionality, performance, power, and robustness of state-of-the-art ML accelerators. You will partner cross-functionally with RTL design, verification, emulation, architecture, ML compiler, firmware/runtime, and ML model teams to define validation requirements, debug cross-layer issues, and drive them to resolution.
Responsibilities
- Define and execute HW-SW integration, functional validation, and characterization plans for ML accelerator IP across emulation, prototyping, and silicon platforms
- Identify risks and develop mitigation strategies
- For new technologies and features, work closely with design engineering on defining performance-power characterization and validation strategy, as well as detailed test plans
- Participate in design reviews and make recommendations to support overall test strategy
- Create test setups, collect and analyze data to help debug technical issues
- Partner with RTL design, design verification, emulation, SoC architecture, ML compiler, firmware/runtime, and system teams to bring up ML workloads, identify root causes, drive cross-layer issues to resolution, and verify fixes
- Convert large amounts of data into a clear summary to communicate to stakeholders at all levels
Minimum Qualifications
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- 8+ years of relevant experience in consumer electronics or related fields
- Experience creating validation plans for hardware products including developing test methodologies for new features and technologies
- Experience with HW-SW integration and validation of ML accelerators or related programmable compute IP, including workload bring-up, functional debug, performance characterization
- Experience with common SOC HW interfaces such as AXI, APB, AHB, OCP
- Experience in troubleshooting with component vendors on test escapes, missing test coverage, etc Experience working with embedded systems that run on RTOS/Android/Linux
- Experience working as a verification or systems engineer
- Experience communicating and collaborating across cross-functional teams and experience communicating and driving issues to resolution across cross functional teams
- Demonstrated understanding of consumer electronics product lifecycle, development process and partner ecosystem
- Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
- Experience with ML frameworks, compilers, runtimes, or model-deployment workflows, including profiling or optimizing ML workload performance, data movement, memory behavior, or power
- Demonstrated experience supporting technical teams, cross-functional groups and vendors to execute against validation plans
- Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
- Experience working with overseas development and manufacturing partners
- Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
- Scripting experience for test automation and data processing/organization
More open roles at Meta
Hiring velocity, headcount trend, and every open posting on one page.
Similar roles
Open postings ranked by description similarity — useful if this role isn't quite right.
- Software Development Engineer II, Post Silicon Validation85% matchAmazon· Austin, Texas, USA· $144k–$194k USD
- Post-Silicon Systems Validation Engineer I, Annapurna Labs82% matchAmazon· Austin, Texas, USA· $111k–$160k USD
- Sr. Post-Silicon Systems Software Validation Engineer, Annapurna Labs82% matchAmazon· Austin, Texas, USA· $193k–$262k USD
- ML Accelerator Performance Validation Engineer, Post Silicon Validation81% matchAmazon· Austin, Texas, USA· $144k–$194k USD
- AI/ML Silicon Verification Solutions Engineer – Tools78% matchAMD· San Jose, California· $146k–$250k USD
- Senior Staff Engineer, Design Verification78% matchSamsung Semiconductor· San Jose, California, United States· $189k–$301k USD