at Apple
Location
San Francisco Bay Area, United States of America
Compensation
$127k–$221k USD
Type
full time
Posted
1 months ago
Market range · company + function + seniority
p25 · target · p75 · n=184
Posted $221k · in the market band
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This role involves the comprehensive bench-level validation, bring-up, and characterization of DDR memory interfaces within Apple's cutting-edge SoCs. You will be responsible for developing and executing electrical tests, automating data collection, and providing crucial design feedback through detailed analysis and reporting. Success in this position requires a hands-on approach to debugging complex silicon issues and a strong understanding of signal and power integrity measurements.
Perform hands-on bench test, bring-up, and characterization of DDR memory interfaces for complex SoCs.
Develop robust benchtop electrical tests, utilizing various interfaces like FPGA, JTAG, SPI, and analog controls.
Automate test execution, data extraction, and report generation through scripting with database and analytical tools.
Debug complex silicon issues and provide detailed characterization reports with actionable design feedback.
Conduct in-system Power Integrity (PI) and Signal Integrity (SI) measurements, correlating results with simulation models.
Collaborate closely with cross-functional teams including Design, System Hardware, and Software to ensure seamless integration and validation.
Support ATE and Product Engineering teams for inter-operability tests and production ramp-up.
Bachelor's degree required.
Proven experience in DDR memory validation, characterization, or bring-up.
Proficiency in scripting languages such as Python, Perl, or MATLAB for test automation and data analysis.
Strong hands-on lab skills with test equipment including oscilloscopes, logic analyzers, and BERTs.
Deep understanding of signal integrity (SI) and power integrity (PI) concepts and measurement techniques.
Demonstrated ability to debug complex silicon issues and drive root cause analysis.
Experience collaborating effectively with cross-functional teams (Design, System HW, SW, ATE).
Familiarity with SoC architecture and various on-chip interfaces (e.g., JTAG, SPI).
Imagine playing a pivotal role in bringing Apple's groundbreaking mobile SoCs to life, impacting millions of users worldwide. As a DDR Silicon Validation Engineer, you will be at the forefront of innovation, performing critical lab characterization and validation of advanced analog and mixed-signal embedded circuits. This is an unparalleled opportunity to join a dynamic, multi-functional team where your expertise will directly contribute to launching products that redefine what's possible and enrich people's lives. If you thrive on solving complex challenges and are eager to shape the future of mobile technology, we invite you to explore this exciting role.
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $126,800 and $220,900, and your base pay will depend on your skills, qualifications, experience, and location.Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant
At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.
Learn about accessibility in Apple’s workplace
Learn about reasonable accommodations for job applicants
Apple accepts applications to this posting on an ongoing basis.
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